1. Field of the Invention
The present invention relates to a flash memory, and more particularly, to a flash memory and its fabrication method.
2. Description of the Related Art
Since a flash memory can store, read or erase data at multiple times, even if power is cut off, the data stored in the memory will not be erased. Accordingly, it becomes a widely adopted non-volatile memory device in the fields of personal computers and electronic apparatuses.
FIG. 1 is a top view of a prior art flash memory. FIG. 2 is a cross sectional view of the structure along II-II′ in FIG. 1.
Referring to FIGS. 1 and 2, the active regions 102 and the isolation structures 104 are alternately disposed within the substrate 100 with the y direction. The control gates 106 are arranged over the substrate 100 with the x direction. The floating gates (not shown) of the memory cell and the tunneling dielectric layers (not shown) are disposed at the regions 110 between the active regions 102 and the control gates 106 which overlap. In addition, the active region 102, which is adjacent to one side of the control gate 106, serves as the source 108a; and the other side of the active region 102 serves as the drain 108b. Usually, the drains 108b on the same column connect with a conductive line (not shown) through the contacts 112. For the sources 108a shown in FIG. 2, the isolation structures 104 of the sources 108a are removed first. The doped regions 114 then are formed within the exposed substrate 100, connecting with sources 108a of the same column. The sources 108a are electrically coupled to a conductive line (not shown) through the source pickup line 116 between two isolation structures 104 and the contacts 118.
The structure described above, however, requires so many contacts that many contact areas for connecting with the drains should be reserved while the array structure is designed. As a result, the area of the flash memory cannot further shrink. It is an obstacle in reducing the dimension of the semiconductor memory.